10AX115H2F34E2SG FPGA Arria® 10 GX Banja 1150000 Maselo 20nm Technology 0.9V 1152-Pin FC-FBGA

10AX115H2F34E2SG FPGA Arria® 10 GX Family 1150000 Maselo 20nm Technology 0.9V 1152-Pin FC-FBGA Chithunzi Chowonetsedwa

Kufotokozera mwachidule:

10AX115H2F34E2SG banja lazida lili ndi magwiridwe antchito apamwamba komanso amphamvu 20 nm apakati amtundu wa FPGAs ndi SoCs.

Kuchita kwapamwamba kuposa mbadwo wakale wapakatikati komanso wapamwamba kwambiri
FPGAs

Titumizireni imelo Tsitsani Datesheet

Tsatanetsatane wa Zamalonda

Zogulitsa Tags

Mafotokozedwe aukadaulo a Zamankhwala

EU RoHS	Wotsatira
ECCN (US)	3A991
Gawo Status	Yogwira
Zithunzi za HTS	8542.39.00.01
Mtengo wa SVHC	Inde
SVHC Ikupitirira malire	Inde
Zagalimoto	No
PPAP	No
Dzina labambo	Arria® 10 GX
Process Technology	20 nm
Wogwiritsa I/Os	504
Nambala ya Olembetsa	1708800
Mphamvu yamagetsi yamagetsi (V)	0.9
Mfundo Zomveka	1150000
Chiwerengero cha Ochulukitsa	3036 (18x19)
Mtundu wa Memory Program	SRAM
Memory Yophatikizidwa (Kbit)	54260
Nambala Yonse ya Block RAM	2713
EMACs	3
Chipangizo Logic Units	1150000
Nambala ya Chipangizo cha DLLs/PLLs	32
Njira za Transceiver	96
Liwiro la Transceiver (Gbps)	17.4
DSP yodzipereka	1518
PCIe	4
Programmability	Inde
Thandizo la Reprogrammability	Inde
Chitetezo cha Copy	Inde
Mu-System Programmability	Inde
Magiredi Othamanga	2
Miyezo ya I/O yokhala ndi Mapeto Amodzi	LVTTL \| LVCMOS
Memory Interface Yakunja	DDR3 SDRAM\|DDR4\|LPDDR3\|RLDRAM II\|RLDRAM III\|QDRII+SRAM
Ochepa Operating Voltage (V)	0.87
Maximum Operating Supply Voltage (V)	0.93
I/O Voltage (V)	1.2\|1.25\|1.35\|1.5\|1.8\|2.5\|3
Kutentha Kochepa Kwambiri (°C)	0
Kutentha Kwambiri (°C)	100
Supplier Temperature Grade	Zokulitsidwa
Dzina lamalonda	Arria
Kukwera	Surface Mount
Phukusi Kutalika	2.95
Phukusi M'lifupi	35
Kutalika kwa Phukusi	35
PCB yasintha	1152
Dzina la Phukusi Lokhazikika	BGA
Phukusi la Supplier	FC-FBGA
Pin Count	1152
Mawonekedwe Otsogolera	Mpira

Kusiyana ndi ubale pakati pa FPGA ndi CPLD

1. FPGA tanthauzo ndi makhalidwe

FPGAimatengera lingaliro latsopano lotchedwa Logic Cell Array (LCA) ndi Configurable Logic Block (CLB) ndi Input Output (IOB) Block ndi Interconnect.The configurable logic module ndiye gawo lofunikira kuti muzindikire ntchito ya wogwiritsa ntchito, yomwe nthawi zambiri imasanjidwa ndikufalitsa chip chonse.IOB yolowetsa-zotulutsa module imamaliza mawonekedwe pakati pa malingaliro pa chip ndi pini ya phukusi lakunja, ndipo nthawi zambiri imakonzedwa mozungulira chip array.Mawaya amkati amakhala ndi utali wosiyanasiyana wa zigawo zamawaya ndi masiwichi olumikizira osinthika, omwe amalumikiza midadada yosinthika yosinthika kapena ma I/O midadada kuti apange dera lokhala ndi ntchito inayake.

Zofunikira za FPGA ndi:

Pogwiritsa ntchito FPGA kupanga dera la ASIC, ogwiritsa ntchito safunikira kupanga polojekiti, atha kupeza chip choyenera;
FPGA itha kugwiritsidwa ntchito ngati zitsanzo zoyendetsa zina mwamakonda kapena makondaZozungulira za ASIC;
Pali zoyambitsa zambiri ndi ma I/O mu FPGA;
FPGA ndi chimodzi mwazida zomwe zimakhala ndi mawonekedwe afupiafupi kwambiri, mtengo wotsika kwambiri wachitukuko komanso chiwopsezo chotsika kwambiri mudera la ASIC.
FPGA imatenga njira yothamanga kwambiri ya CHMOS, kugwiritsa ntchito mphamvu zochepa, ndipo imatha kugwirizana ndi CMOS ndi TTL.

2, CPLD tanthauzo ndi makhalidwe

CPLDmakamaka amapangidwa ndi programmable Logic Macro Cell (LMC) kuzungulira pakati pa programmable interconnection matrix unit, mmene LMC logic dongosolo ndi zovuta kwambiri, ndipo ali ndi zovuta I/O unit cholumikizira dongosolo, akhoza kupangidwa ndi wosuta malinga ndi zofunika za dongosolo lapadera la dera, kuti amalize ntchito zina.Chifukwa midadada yomveka imalumikizidwa ndi mawaya achitsulo osasunthika ku CPLD, gawo lolinganiza lopangidwa limakhazikika nthawi ndipo limapewa kuipa kwa kulosera kosakwanira kwa nthawi yamagulu olumikizirana magawo.Pofika m'ma 1990, CPLD idakula mwachangu, osati ndi mawonekedwe ofufutira amagetsi okha, komanso ndi zida zapamwamba monga kusanthula m'mphepete ndi mapulogalamu apa intaneti.

Makhalidwe a mapulogalamu a CPLD ndi awa:

Zolinga zomveka komanso zokumbukira ndizochuluka (Cypress De1ta 39K200 ili ndi zoposa 480 KB ya RAM);
Njira yosinthira nthawi yokhala ndi zida zosinthira;
flexible kusintha pini linanena bungwe;
Ikhoza kukhazikitsidwa pa dongosolo ndi kukonzedwanso;
Chiwerengero chachikulu cha ma I/O mayunitsi;

3. Kusiyana ndi kulumikizana pakati pa FPGA ndi CPLD

CPLD ndiye chidule cha chipangizo chosavuta chokonzekera, FPGA ndiye chidule cha chipata chokhazikika, ntchito ya awiriwa ndi yofanana, koma mfundo yoyendetsera ndi yosiyana pang'ono, kotero nthawi zina timatha kunyalanyaza kusiyana pakati pa ziwirizi, palimodzi. Amatchedwa kuti programmable logic device kapena CPLD/FPGA.Pali makampani angapo omwe amapanga CPLD/FPGas, atatu akulu kwambiri ndi ALTERA,XILINX, ndi LAT-TICE.CPLD decomposition combinatorial logic function ndi yamphamvu kwambiri, macro unit imatha kuwola khumi ndi awiri kapena kupitilira 20-30 combinatorial logic input.Komabe, LUT ya FPGA imatha kuthana ndi zophatikiza za 4, chifukwa chake CPLD ndiyoyenera kupanga malingaliro ophatikizika ophatikizika monga decoding.Komabe, kupanga kwa FPGA kumatsimikizira kuti kuchuluka kwa LUTs ndi zoyambitsa zomwe zili mu chipangizo cha FPGA ndi zazikulu kwambiri, nthawi zambiri zikwi zikwi,CPLD imatha kukwaniritsa mayunitsi omveka a 512, ndipo ngati mtengo wa chip wagawidwa ndi chiwerengero cha zomveka. mayunitsi, mtengo wapakati wa FPGA ndi wotsika kwambiri kuposa wa CPLD.Chifukwa chake ngati zoyambitsa zambiri zimagwiritsidwa ntchito pamapangidwe, monga kupanga malingaliro ovuta anthawi, ndiye kugwiritsa ntchito FPGA ndi chisankho chabwino.

Ngakhale FPGA ndi CPLD ndi zida zosinthika za ASIC ndipo zili ndi mawonekedwe ambiri, chifukwa cha kusiyana kwa kapangidwe ka CPLD ndi FPGA, ali ndi mawonekedwe awo:

CPLD ndiyoyenera kumaliza ma aligorivimu osiyanasiyana ndi malingaliro ophatikizika, ndipo FPGA ndiyoyenera kukwaniritsa malingaliro otsatizana.Mwanjira ina, FPGA ndiyabwino kwambiri pamapangidwe olemera a flip-flop, pomwe CPLD ndiyabwino kwambiri pa flip-flop limited and product term rich structure.
Mayendedwe osalekeza a CPLD amatsimikizira kuti kuchedwa kwake kumakhala kofanana komanso kodziwikiratu, pomwe mawonekedwe a FPGA amawonetsa kuti kuchedwa kwake sikungadziwike.
FPGA imakhala yosinthika kwambiri kuposa CPLD pamapulogalamu.
CPLD imakonzedwa ndikusintha magwiridwe antchito amtundu wokhazikika wamkati, pomwe FPGA imakonzedwa ndikusintha mawaya a kulumikizana kwamkati.
Fpgas imatha kukonzedwa pansi pazitseko zomveka, pomwe CPLDS imakonzedwa pansi pa midadada yamalingaliro.
FPGA ndi yophatikizika kwambiri kuposa CPLD ndipo ili ndi ma waya ovuta kwambiri komanso kukhazikitsa malingaliro.

Nthawi zambiri, kugwiritsa ntchito mphamvu kwa CPLD ndikwambiri kuposa FPGA, ndipo kuchuluka kwa kuphatikizana kumakhala koonekeratu.

Zam'mbuyo: XCVU9P-2FLGB2104I FPGA,VIRTEX ULTRASCALE,FCBGA-2104

Ena: XC7VX690T-2FFG1927I yatsopano komanso yoyambirira yokhala ndi FPGA yanu

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