LCMXO2-256HC-4TG100C Yoyambirira komanso Yatsopano Yokhala Ndi Mtengo Wapikisano Mu Stock IC Supplier
Makhalidwe a Zamalonda
Pbfree kodi | Inde |
Rohs kodi | Inde |
Part Life Cycle Code | Yogwira |
Wopanga Ihs | Malingaliro a kampani LATTICE SEMICONDUCTOR CORP |
Gawo Phukusi Code | Mtengo wa QFP |
Kufotokozera Phukusi | LFQFP, |
Pin Count | 100 |
Fikirani Khodi Yotsatira | omvera |
ECCN kodi | NDI 99 |
HTS kodi | 8542.39.00.01 |
Wopanga Samacsys | Lattice Semiconductor |
Mbali yowonjezera | Imagwiranso ntchito pa 3.3 V NOMINAL SUPPLY |
JESD-30 kodi | S-PQFP-G100 |
JESD-609 kodi | e3 |
Utali | 14 mm |
Chinyezi Sensitivity Level | 3 |
Chiwerengero cha Zolowetsa Zodzipereka | |
Nambala ya I/O Lines | |
Nambala ya Zolowetsa | 55 |
Chiwerengero cha Zotuluka | 55 |
Nambala ya Ma Terminal | 100 |
Kutentha kwa Ntchito-Max | 85 °C |
Kutentha kwa Ntchito-Min | |
Bungwe | 0 ZOPEREKA ZOPEREKA, 0 I/O |
Ntchito Zotulutsa | ZOSAKIKA |
Phukusi Thupi Zakuthupi | PLASTIC/EPOXY |
Phukusi Kodi | Mtengo wa LFQFP |
Package Equivalence Code | TQFP100,.63SQ |
Phukusi Mawonekedwe | SQUARE |
Mtundu wa Phukusi | FLTPACK, NTCHITO YONSE, PITCH YABWINO |
Njira Yopakira | TRAY |
Peak Reflow Temperature (Cel) | 260 |
Zida Zamagetsi | 2.5 / 3.3 V |
Programmable Logic Type | Chithunzi cha FLASH PLD |
Kuchedwa Kufalitsa | 7.36 ndi |
Mkhalidwe Woyenerera | Osayeneretsedwa |
Atakhala Kutalika-Max | 1.6 mm |
Supply Voltage-Max | 3.462 V |
Supply Voltage-Min | 2.375 V |
Supply Voltage-Nom | 2.5 V |
Surface Mount | INDE |
Kalasi ya Kutentha | ENA |
Pomaliza | Matte Tin (Sn) |
Fomu ya Terminal | GULL WING |
Terminal Pitch | 0.5 mm |
Malo Okwerera | QUAD |
Time@Peak Reflow Temperature-Max (s) | 30 |
M'lifupi | 14 mm |
Chiyambi cha Zamalonda
Complex Programmable Logic Device (CPLD) ndi pulogalamu ya Integrated Circuit (ASIC) mu LSI (Large Scale Integrated Circuit) Integrated Circuit).Ndioyenera kuwongolera makina amachitidwe a digito, ndipo kuwongolera kwake kuchedwa ndikosavuta.CPLD ndi imodzi mwazida zomwe zikukula mwachangu m'mabwalo ophatikizika.
Zithunzi za CPLD
CPLD ndi chipangizo chosavuta chokonzekera chomwe chili ndi masikelo akulu komanso ovuta, omwe ndi amitundu yayikulu.mabwalo ophatikizika.
CPLD ili ndi magawo asanu: logical array block, macro unit, nthawi yayitali yazinthu, mawaya osinthika komanso block block ya I/O.
1. Logical Array Block (LAB)
Chida chowoneka bwino chimakhala ndi ma cell 16 akuluakulu, ndipo ma LABS angapo amalumikizidwa pamodzi ndi pulogalamu yosinthika (PIA) ndi basi yapadziko lonse lapansi.
2. Macro unit
Chigawo chachikulu cha mndandanda wa MAX7000 chili ndi midadada itatu: mndandanda womveka, masanjidwe osankha zinthu, ndi kaundula wokonzekera.
3. Anawonjezera mankhwala akuti
Mawu amodzi amtundu uliwonse wa macro cell amatha kubwezeredwa m'malo omveka bwino.
4. Dongosolo lokonzekera mawaya PIA
LAB iliyonse imatha kulumikizidwa kuti ipange malingaliro ofunikira kudzera pamagawo opangira mawaya.Basi yapadziko lonse iyi ndi njira yosinthika yomwe imatha kulumikiza gwero lililonse lazidziwitso mu chipangizocho kupita komwe ikupita.
5. I/O control block
Chida chowongolera cha I / O chimalola pini iliyonse ya I / O kukhazikitsidwa payekhapayekha kuti ikhale yolowera / zotulutsa komanso zowongolera.
Kuyerekeza kwa CPLD ndi FPGA
Ngakhale onse awiriFPGAndiCPLDndi zida za ASIC zosinthika ndipo zimakhala ndi mawonekedwe ambiri, chifukwa cha kusiyana kwa kapangidwe ka CPLD ndi FPGA, ali ndi mawonekedwe awo:
1.CPLD ndiyoyenera kwambiri kumaliza ma algorithms osiyanasiyana ndi malingaliro ophatikizika, ndipo FP GA ndiyoyeneranso kukwaniritsa malingaliro otsatizana.Mwanjira ina, FPGA ndiyabwino kwambiri pamapangidwe olemera a flip-flop, pomwe CPLD ndiyabwino kwambiri pa flip-flop limited and product term rich structure.
2.Mapangidwe opitilira njira a CPLD amatsimikizira kuti kuchedwa kwake kwa nthawi kumakhala kofanana komanso kodziwikiratu, pomwe gawo la FPGA la FPGA limatsimikizira kuchedwa kwake.
3.FPGA ili ndi kusinthasintha kwambiri kuposa CPLD pamapulogalamu.CPLD imakonzedwa ndikusintha magwiridwe antchito ndi gawo lolumikizana lamkati, pomwe FPGA imakonzedwa ndikusintha mawaya a kulumikizana kwamkati.FP GA ikhoza kukonzedwa pansi pa chipata cha logic, pamene CPLD imakonzedwa pansi pa logic block.
4.Kuphatikizika kwa FPGA ndikwapamwamba kuposa CPLD, ndipo ili ndi mawonekedwe ovuta kwambiri a wiring ndi kukhazikitsa malingaliro.
5.CPLD ndiyosavuta kugwiritsa ntchito kuposa FPGA.Mapulogalamu a CPLD pogwiritsa ntchito ukadaulo wa E2PROM kapena FASTFLASH, palibe chipangizo chokumbukira chakunja, chosavuta kugwiritsa ntchito.Komabe, zidziwitso zamapulogalamu a FPGA ziyenera kusungidwa mu kukumbukira kwakunja, ndipo njira yogwiritsira ntchito ndiyovuta.
6. CPLDS ndi yachangu kuposa FPgas ndipo ali ndi nthawi yolosera kwambiri.Izi ndichifukwa choti ma FPGas ndi mapulogalamu apazipata ndipo zolumikizana zogawidwa zimatengedwa pakati pa CLBS, pomwe CPLDS ndi mapulogalamu a logic block-level ndipo kulumikizana pakati pa midadada yawo kumasokonekera.
7.Munjira yamapulogalamu, CPLD imakhazikika pa E2PROM kapena FLASH memory programming, nthawi zamapulogalamu mpaka nthawi 10,000, ubwino wake ndikuti makinawo amazimitsa zambiri zamapulogalamu samatayika.CPLD ikhoza kugawidwa m'magulu awiri: mapulogalamu pa mapulogalamu ndi mapulogalamu pa dongosolo.Zambiri za FPGA zimachokera ku mapulogalamu a SRAM, chidziwitso cha mapulogalamu chimatayika pamene dongosolo lazimitsidwa, ndipo deta ya mapulogalamu iyenera kulembedwa ku SRAM kuchokera kunja kwa chipangizo nthawi iliyonse yomwe yayatsidwa.Ubwino wake ndikuti ukhoza kukonzedwa nthawi iliyonse, ndipo ukhoza kukonzedwa mwamsanga mu ntchito, kuti ukwaniritse kasinthidwe kameneka pamagulu a bolodi ndi dongosolo la dongosolo.
8.Chinsinsi cha CPLD ndichabwino,Chinsinsi cha FPGA ndichabwino.
9.Mwachizoloŵezi, mphamvu yogwiritsira ntchito mphamvu ya CPLD ndi yaikulu kuposa ya FPGA, ndipo pamwamba pa digiri ya kuphatikizika, ndizodziwikiratu.